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5962-9308501MXC +BOM

CPLD ispLSI® 1000 Family 6K Gates 128 Macro Cells 60MHz 5V 84-Pin CPGA

lattice Inventar

Hauptmerkmale

  • HIGH-DENSITY PROGRAMMABLE LOGIC
  • — High Speed Global Interconnect
  • — 6000 PLD Gates
  • — 64 I/O Pins, Eight Dedicated Inputs
  • — 192 Registers
  • — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
  • — Small Logic Block Size for Fast Random Logic
  • — Security Cell Prevents Unauthorized Copying
  • HIGH PERFORMANCE E2CMOS® TECHNOLOGY
  • — fmax = 90 MHz Maximum Operating Frequency
  • — fmax = 60 MHz for Industrial and Military/883 Devices
  • — tpd = 12 ns Propagation Delay
  • — TTL Compatible Inputs and Outputs
  • — Electrically Erasable and Reprogrammable
  • — Non-Volatile E2CMOS Technology
  • — 100% Tested
  • ispLSI OFFERS THE FOLLOWING ADDED FEATURES
  • — In-System Programmable™ (ISP™) 5-Volt Only
  • — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
  • — Reprogram Soldered Devices for Faster Prototyping
  • COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
  • — Complete Programmable Device Can Combine Glue Logic and Structured Designs
  • — Four Dedicated Clock Input Pins
  • — Synchronous and Asynchronous Clocks
  • — Flexible Pin Placement
  • — Optimized Global Routing Pool Provides Global Interconnectivity
  • ispLSI AND pLSI DEVELOPMENT TOOLS
  • pDS® Software
  • — Easy to Use PC Windows™ Interface
  • — Boolean Logic Compiler
  • — Manual Partitioning
  • — Automatic Place and Route
  • — Static Timing Table
  • ispDS+™ Software
  • — Industry Standard, Third Party Design Environments
  • — Schematic Capture, State Machine, HDL
  • — Automatic Partitioning and Place and Route
  • — Comprehensive Logic and Timing Simulation
  • — PC and Workstation Platforms
lattice Originalbestand
lattice Inventar

Spezifikationen

Product Category CPLD - Complex Programmable Logic Devices Shipping Restrictions This product may require additional documentation to export from the United States.
Mounting Style SMD/SMT Operating Supply Voltage 5 V
Number of Macrocells 128 Macrocell Number of I/Os 64 I/O
Supply Voltage - Max 5.5 V Supply Voltage - Min 4.5 V
Minimum Operating Temperature - 55 C Maximum Operating Temperature + 125 C
Maximum Operating Frequency 60 MHz Propagation Delay - Max 20 ns
Height 3.68 mm Length 29.97 mm
Number of Gates 6000 Number of Logic Array Blocks - LABs 32
Operating Supply Current 220 mA Product Type CPLD - Complex Programmable Logic Devices
Factory Pack Quantity 1 Subcategory Programmable Logic ICs
Width 29.97 mm Unit Weight 0.488544 oz

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