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Siehe Technische Spezifikationen

EP1S40F1020I6N +BOM

EP1S40F1020I6N is a Field-Programmable Gate Array with 4697 CLBS and a PBGA1020 package

Hersteller:

Intel Corp
Herstellerteil #:

EP1S40F1020I6N
Datenblatt:

EP1S40F1020I6N Datenblatt (PDF)
Feature-family-name:

Stratix®
Feature-process-technology:

130nm
Feature-maximum-number-of-user-i-os:

773
Feature-device-logic-cells:

41250
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an EP1S40F1020I6N

EP1S40F1020I6N Allgemeine Beschreibung

EP1S40F1020I6N is a highly advanced and versatile model of electronic component, designed to offer exceptional programmability and integration capabilities. As part of the Altera Stratix series of FPGAs, this specific model is known for its reliability and performance in a wide range of applications. With approximately 40 logic elements or gates, it offers a considerable level of complexity and functionality, making it suitable for demanding tasks

Spezifikationen

feature-family-name	Stratix®	feature-process-technology	130nm
feature-maximum-number-of-user-i-os	773	feature-number-of-registers
feature-device-logic-cells	41250	feature-device-system-gates
feature-number-of-multipliers	112 (9x9)	feature-program-memory-type	SRAM
feature-ram-bits-kbit	3343.5	feature-total-number-of-block-ram	4+183+384
feature-ethernet-macs		feature-supported-ip-core	32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz\|DI2CSB I2C Bus Interface-Slave\|IFI Advanced CAN IP\|PCI Express Cores\|Video LVDS SerDes Transmitter / Receiver
feature-supported-ip-core-manufacture	Microtronix Inc/CAST, Inc/Northwest Logic, Inc/IFI/Digital Core Design/PLDA	feature-maximum-number-of-serdes-channels	30
feature-device-logic-units	41250	feature-device-number-of-dlls-plls	12
feature-transceiver-blocks		feature-transceiver-speed-gbps
feature-dedicated-dsp	14	feature-pci-blocks
feature-programmability	No	feature-maximum-internal-frequency-mhz	450.05
feature-speed-grade	6	feature-giga-multiply-accumulates-per-second
feature-differential-i-o-standards-supported	PCML\|LVDS\|LVPECL	feature-single-ended-i-o-standards-supported	LVCMOS\|LVTTL
feature-external-memory-interface	ZBT SRAM\|QDR II+SRAM\|FCRAM\|DDR SDRAM	feature-minimum-operating-supply-voltage-v	1.425
feature-maximum-operating-supply-voltage-v	1.575	feature-packaging
feature-rad-hard		feature-pin-count	1020
feature-cecc-qualified	No	feature-esd-protection
feature-escc-qualified		feature-military	No
feature-aec-qualified	No	feature-aec-qualified-number
feature-auto-motive	No	feature-p-pap	No
feature-eccn-code	3A001.a.7.a	feature-svhc	Yes
feature-svhc-exceeds-threshold	No

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