Bezahlverfahren
EPF10K30RC240-3 +BOM
A versatile FPGA with 216 cells, 240 pins, and a plastic QFP package for easy integration into circuit designs
QFP-240-
Hersteller:
-
Herstellerteil #:
EPF10K30RC240-3
-
Datenblatt:
-
Series:
EPF10K30 FLEX 10K
-
Number Of Logic Elements:
1728 LE
-
Embedded Memory:
12 kbit
-
Number Of I/Os:
189 I/O
-
EDA/CAD Modelle:
Verfügbarkeit: 8416 Stck
Bitte füllen Sie das kurze Formular unten aus und wir werden Ihnen umgehend ein Angebot zukommen lassen..
EPF10K30RC240-3 Allgemeine Beschreibung
The EPF10K30RC240-3, part of Altera's MAX® 7000 family, is a programmable logic device designed for moderate to complex digital designs. With 3000 logic elements, 240 pins, and a speed grade of -3, this PLD offers versatility and performance for a range of applications. Its reprogrammable nature allows for iterative refinement of designs without the need for costly hardware redesigns, making it a popular choice in telecommunications, industrial automation, and consumer electronics
Hauptmerkmale
- The industry’s first embedded programmable logic device (PLD) family, providing System-on-a-Programmable-Chip (SOPC) integration
- – Embedded array for implementing megafunctions, such as efficient memory and specialized logic functions
- – Logic array for general logic functions
- High density
- – 10,000 to 250,000 typical gates (see Tables 1 and 2)
- – Up to 40,960 RAM bits; 2,048 bits per embedded array block (EAB), all of which can be used without reducing logic capacity
- System-level features
- – MultiVoltTM I/O interface support
- – 5.0-V tolerant input pins in FLEX® 10KA devices
- – Low power consumption (typical specification less than 0.5 mA in standby mode for most devices)
- – FLEX 10K and FLEX 10KA devices support peripheral component interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2
- – FLEX 10KA devices include pull-up clamping diode, selectable on a pin-by-pin basis for 3.3-V PCI compliance
- – Select FLEX 10KA devices support 5.0-V PCI buses with eight or fewer loads
- – Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990, available without consuming any device logic
- – Devices are fabricated on advanced processes and operate with a 3.3-V or 5.0-V supply voltage (see Table 3
- – In-circuit reconfigurability (ICR) via external configuration device, intelligent controller, or JTAG port
- – ClockLockTM and ClockBoostTM options for reduced clock delay/skew and clock multiplication
- – Built-in low-skew clock distribution trees
- – 100% functional testing of all devices; test vectors or scan chains are not required
- Flexible interconnect
- – FastTrack® Interconnect continuous routing structure for fast, predictable interconnect delays
- – Dedicated carry chain that implements arithmetic functions such as fast adders, counters, and comparators (automatically used by software tools and megafunctions)
- – Dedicated cascade chain that implements high-speed, high-fan-in logic functions (automatically used by software tools and megafunctions)
- – Tri-state emulation that implements internal tri-state buses
- – Up to six global clock signals and four global clear signals
- Powerful I/O pins
- – Individual tri-state output enable control for each pin
- – Open-drain option on each I/O pin
- – Programmable output slew-rate control to reduce switching noise
- – FLEX 10KA devices support hot-socketing
- Peripheral register for fast setup and clock-to-output delay
- Flexible package options
- – Available in a variety of packages with 84 to 600 pins (see Tables 4 and 5)
- – Pin-compatibility with other FLEX 10K devices in the same package
- – FineLine BGATM packages maximize board space efficiency
- Software design support and automatic place-and-route provided by Altera development systems for Windows-based PCs and Sun SPARCstation, HP 9000 Series 700/800 workstations
- Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), DesignWare components, Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity, VeriBest, and Viewlogic
Spezifikationen
Product Category | FPGA - Field Programmable Gate Array | Series | EPF10K30 FLEX 10K |
Number of Logic Elements | 1728 LE | Adaptive Logic Modules - ALMs | - |
Embedded Memory | 12 kbit | Number of I/Os | 189 I/O |
Supply Voltage - Min | 4.75 V | Supply Voltage - Max | 5.25 V |
Minimum Operating Temperature | 0 C | Maximum Operating Temperature | + 70 C |
Mounting Style | SMD/SMT | Packaging | [ "Tray" ] |
Moisture Sensitive | Yes | Number of Gates | 69000 |
Number of Logic Array Blocks - LABs | 216 LAB | Operating Supply Current | 10 mA |
Operating Supply Voltage | 5 V | Product Type | FPGA - Field Programmable Gate Array |
Factory Pack Quantity | 24 | Subcategory | Programmable Logic ICs |
Total Memory | 12288 bit | Tradename | FLEX 10K |
Part # Aliases | 968017 |
Servicerichtlinien und andere
After-Sales- und Abwicklungsbezogen
Für alternative Zahlungskanäle kontaktieren Sie uns bitte unter:
[email protected]Versandart
AVAQ bestimmt und verpackt alle Geräte auf der Grundlage der Schutzanforderungen gegen elektrostatische Entladung (ESD) und Feuchtigkeitsempfindlichkeit (MSL)..
365-Tage-Produkt
Qualitätsgarantie
Wir versprechen, 365 Tage Qualitätssicherung für alle unsere Produkte zu bieten.
In Stock: 8.416
Minimum Order: 1
Menge. | Einzelpreis | Ext. Preis |
---|---|---|
1+ | - | - |
Die unten angegebenen Preise dienen nur als Referenz.
Alle Stücklisten (BOM) können per E-Mail gesendet werden an [email protected], oder füllen Sie das untenstehende Formular aus, um ein Angebot für EPF10K30RC240-3 zu erstellen, garantierte Angebote zurück innerhalb 12 Std.