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Siehe Technische Spezifikationen

KSZ8565RTXV-VAO +BOM

Compact 128-Pin TQFP Package

Hersteller:

Microchip Technology, Inc
Herstellerteil #:

KSZ8565RTXV-VAO
Datenblatt:

KSZ8565RTXV-VAO Datenblatt (PDF)
Mask:

STH01
LeadContent:

Pb-FREE
RestrictionLevel:

STANDARD
PackingMedia:

TRAY
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an KSZ8565RTXV-VAO

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

KSZ8565RTXV-VAO Allgemeine Beschreibung

The KSZ8565RTXV-VAO Ethernet switch by Microchip Technology offers a reliable and efficient solution for industrial networking needs. With its eight high-speed copper ports, this switch provides seamless connectivity for various applications. Its integration of magnetics simplifies installation and reduces the overall footprint of the device. Additionally, the support for Energy Efficient Ethernet ensures that power consumption is minimized, making it a sustainable choice for environmentally-conscious operations

Hauptmerkmale

Non-blocking wire-speed Ethernet switching fabric
IEEE802.1AS (AVB) time synchronization support
IEEE802.1Qav (AVB) credit based traffic shaper
Time aware traffic scheduler with low latency cut-through mode
IEEE1588v2 Precision Time Protocol support
Time-stamping on all ports
Precision GPIO pin timed to the AVB/1588 clock
Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
IEEE802.1X support (Port-Based Network Access Control)
IEEE802.1Q VLAN supportfor 128 active VLAN groups and the full range of 4096 VLAN IDs
IEEE802.1p/Q tag insertion or removal on a per port basis and support for double-tagging
VLAN ID tag/untag options on per port basis
IEEE802.3x full-duplex flow control and half-duplex back pressure collision control
IGMPv1/v2/v3 snooping for multicast packet filtering
IPv6 multicast listener discovery (MLD) snooping
QoS/CoS packets prioritization support: 802.1p, DiffServ-based and re-mapping of 802.1p priority field per-port basis on four priority levels
IPv4/IPv6 QoS support
Programmable rate limiting at ingress and egress ports
Broadcast storm protection
Four priority queues with dynamic packet mapping for IEEE802.1p, IPv4 DIFFSERV, IPv6 TrafficClass
MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
Self-address filtering for implementing ring topologies
High-speed SPI (4-wire, up to 50MHz) interface to access all internal registers
I2C Interface to access all registers
MII management (MIIM, MDC/MDIO 2 wire) interface to access all PHY registers per IEEE 802.3 specification
In-band management to access all registers via any of the five ports, strap enabled
I/O pin strapping facility to set certain register bits from I/O pins at reset time
Control registers configurable on-the-fly
Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
MIB counters for fully-compliant statistics gathering (34 MIB counters per port)
Full-chip software power-down
Energy detect power-down (EDPD)
Support IEEE P802.3az Energy Efficient Ethernet (EEE)
Wake on LAN (WoL) support

Microchip Technology, Inc Originalbestand

Spezifikationen

Mask	STH01	LeadContent	Pb-FREE
RestrictionLevel	STANDARD	PackingMedia	TRAY
TempLevel	Special	TempRange	-40C to +105C
Stage	REL	LeadCount	128
ProductClassDescription	Special Test Temp	PackingMediaDescription	Tray
Weight	0.0018888889	Ethernet Bandwidth	10/100Mbps
Interrupt Pin	Yes	Op Voltage	3.3
# Ethernet Ports	4	Interface	MII/RMII/RGMII
IEEE1588	Yes	Temp Range Min	-40
Temp Range Max	105	Managed	Yes
Copper Support	10/100 (4)	Fiber Support	No
Supply Voltage (V)	3.3	Internal LDO	No
Vdd I/O (V)	1.8/2.5/3.3	LinkMD Cable Diag	Yes
On-Chip Termination	Yes	Smart Power Adjust	Yes
Largest Pkt-Size Bytes	9000	IPV6	Yes
Flow Ctrl	Yes	Rate Limiting	Yes
Rapid Spanning Tree	Yes	Static MAC Address	Yes

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