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Siehe Technische Spezifikationen

LFXP2-17E-5FN484C +BOM

The LFXP2-17E-5FN484C is an FPGA IC from the XP2 series, featuring 358 logic elements and 282624 bits of memory in a 484-BBGA package

Hersteller:

Lattice Semiconductor Corporation
Herstellerteil #:

LFXP2-17E-5FN484C
Datenblatt:

LFXP2-17E-5FN484C Datenblatt (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Active
Pin Count:

484
Reach Compliance Code:

compliant
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an LFXP2-17E-5FN484C

LFXP2-17E-5FN484C Allgemeine Beschreibung

Furthermore, the presence of 4 PLLs in the LFXP2-17E-5FN484C allows for precise clock signal generation, ensuring synchronization among different components of your system. Packaged in a compact 484-ball FBGA, this FPGA is ideal for projects where space is at a premium. Additionally, the low core voltage of 1.2V helps in keeping power consumption in check, while the 3.3V I/O voltage ensures compatibility with a wide range of components

Hauptmerkmale

Fully supports PowerPC™ 60x bus protocol, include PowerPC 603, 604, 740, 750 and 8260.
Supports up to eight PowerPC bus masters with unlimited slave device support.
Supports two outstanding bus accesses.
Supports address only transfer and address bus retry.
Independent address bus and data bus tenure with separate bus grant and data bus grant.
Option for fixed priority assignment or rotating priority scheme.
Designed for ASIC or programmable logic device implementations in various system environments.
Fully static design with edge triggered flip-flops.
Optimized for ispXPGA product family.

Spezifikationen

Pbfree Code	Yes	Part Life Cycle Code	Active
Pin Count	484	Reach Compliance Code	compliant
ECCN Code	3A991.D	HTS Code	8542.39.00.01
Clock Frequency-Max	435 MHz	Combinatorial Delay of a CLB-Max	0.494 ns
JESD-30 Code	S-PBGA-B484	JESD-609 Code	e1
Length	23 mm	Moisture Sensitivity Level	3
Number of CLBs	2125	Number of Inputs	358
Number of Logic Cells	17000	Number of Outputs	358
Number of Terminals	484	Operating Temperature-Max	85 °C
Operating Temperature-Min		Peak Reflow Temperature (Cel)	250
Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY	Qualification Status	Not Qualified
Seated Height-Max	2.6 mm	Supply Voltage-Max	1.26 V
Supply Voltage-Min	1.14 V	Supply Voltage-Nom	1.2 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	OTHER	Terminal Finish	TIN SILVER COPPER
Terminal Form	BALL	Terminal Pitch	1 mm
Terminal Position	BOTTOM	Width	23 mm

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