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Siehe Technische Spezifikationen

MT29F2G08AADWP:D +BOM

Flash memory chip with 256 megabits organized as 8 megabytes, with a 20 nanosecond access time, in a lead-free dual in-line package with 48 pins

Hersteller:

Micron Technology
Herstellerteil #:

MT29F2G08AADWP:D
Datenblatt:

MT29F2G08AADWP:D Datenblatt (PDF)
ECCN (US):

EAR99
Automotive:

No
PPAP:

No
Cell Type:

NAND
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an MT29F2G08AADWP:D

MT29F2G08AADWP:D Allgemeine Beschreibung

Micron NAND Flash devices include an asynchronous data interface for high-perform ance I/O operations. These devices use a highly multiplexed 8-bit bus (DQx) to transfer commands,address, and data. There are five control signals used to implement the asyn chronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional signals control hardware write protection (WP#) and monitor device status (R/B#).

Hauptmerkmale

Open NAND Flash Interface (ONFI) 2.2-compliant1

Multiple-level cell (MLC) technology

Organization

Page size x8: 8640 bytes (8192 + 448 bytes)

Block size: 256 pages (2048K + 112K bytes)

Plane size: 2 planes x 2048 blocks per plane

Device size: 64Gb: 4096 blocks;

128Gb: 8192 blocks;

256Gb: 16,384 blocks;

512Gb: 32,786 blocks

Synchronous I/O performance

Up to synchronous timing mode 5

Clock rate: 10ns (DDR)

Read/write throughput per pin: 200 MT/s

Asynchronous I/O performance

Up to asynchronous timing mode 5

tRC/tWC: 20ns (MIN)

Array performance

Read page: 50s (MAX)

Program page: 1300s (TYP)

Erase block: 3ms (TYP)

Operating Voltage Range

VCC: 2.73.6V

VCCQ: 1.71.95V, 2.73.6V

Command set: ONFI NAND Flash Protocol

Advanced Command Set

Program cache

Read cache sequential

Read cache random

One-time programmable (OTP) mode

Multi-plane commands

Multi-LUN operations

Read unique ID

Copyback

First block (block address 00h) is valid when shipped

from factory. For minimum required ECC, see

Error Management (page 109).

RESET (FFh) required as first command after power

Operation status byte provides software method for

detecting

Operation completion

Pass/fail condition

Write-protect status

Data strobe (DQS) signals provide a hardware method

for synchronizing data DQ in the synchronous

interface

Copyback operations supported within the plane

from which data is read

Quality and reliability

Data retention: 10 years

Endurance: 5000 PROGRAM/ERASE cycles

Operating temperature:

Commercial: 0C to +70C

Industrial (IT): 40C to +85C

Package

52-pad LGA

48-pin TSOP

100-ball BGA

Spezifikationen

ECCN (US)	EAR99	Part Status	Obsolete
Automotive	No	PPAP	No
Cell Type	NAND	Chip Density (bit)	2G
Architecture	Sectored	Boot Block	No
Block Organization	Symmetrical	Programmability	Yes
Timing Type	Asynchronous	Interface Type	Parallel
Minimum Operating Supply Voltage (V)	2.7	Typical Operating Supply Voltage (V)	3\|3.3
Maximum Operating Supply Voltage (V)	3.6	Minimum Operating Temperature (°C)	0
Maximum Operating Temperature (°C)	70	Packaging	Tray
Mounting	Surface Mount	PCB changed	48
Pin Count	48	Lead Shape	Gull-wing

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