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Siehe Technische Spezifikationen

MT29F64G08CBABAWP:B +BOM

Advanced TSOPI-48 package for reliable performance in a variety of devices

Hersteller:

Micron Technology Inc.
Herstellerteil #:

MT29F64G08CBABAWP:B
Datenblatt:

MT29F64G08CBABAWP:B Datenblatt (PDF)
Part Life Cycle Code:

Obsolete
Reach Compliance Code:

compliant
ECCN Code:

EAR99
HTS Code:

8542.32.00.51
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an MT29F64G08CBABAWP:B

MT29F64G08CBABAWP:B Allgemeine Beschreibung

Designed for optimum performance, the MT29F64G08CBABAWP:B chip from Micron Technology is a reliable storage solution with 64 gigabits of capacity. Its fast data transfer speeds make it ideal for applications that require quick access to data, while its low voltage operation ensures efficient power consumption, extending the battery life of devices. Its versatile design and industry-standard interface make it easy to integrate into various systems, catering to the diverse needs of users across different platforms

Hauptmerkmale

Open NAND Flash Interface (ONFI) 2.2-compliant1
Multiple-level cell (MLC) technology
Organization
– Page size x8: 8640 bytes (8192 + 448 bytes)
– Block size: 256 pages (2048K + 112K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 64Gb: 4096 blocks;
128Gb: 8192 blocks;
256Gb: 16,384 blocks;
512Gb: 32,786 blocks
Synchronous I/O performance
– Up to synchronous timing mode 5
– Clock rate: 10ns (DDR)
– Read/write throughput per pin: 200 MT/s
Asynchronous I/O performance
– Up to asynchronous timing mode 5
tRC/tWC: 20ns (MIN)
Array performance
– Read page: 50µs (MAX)
– Program page: 1300µs (TYP)
– Erase block: 3ms (TYP)
Operating Voltage Range
– VCC: 2.7–3.6V
– VCCQ: 1.7–1.95V, 2.7–3.6V
Command set: ONFI NAND Flash Protocol
Advanced Command Set
– Program cache
– Read cache sequential
– Read cache random
– One-time programmable (OTP) mode
– Multi-plane commands
– Multi-LUN operations
– Read unique ID
– Copyback
First block (block address 00h) is valid when shipped
from factory. For minimum required ECC, see
Error Management (page 109).
RESET (FFh) required as first command after power
Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
Data strobe (DQS) signals provide a hardware method
for synchronizing data DQ in the synchronous
interface
Copyback operations supported within the plane
from which data is read
Quality and reliability
– Data retention: 10 years
– Endurance: 5000 PROGRAM/ERASE cycles
Operating temperature:
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
Package
– 52-pad LGA
– 48-pin TSOP
– 100-ball BGA

Spezifikationen

Part Life Cycle Code	Obsolete	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.32.00.51
Command User Interface	YES	Common Flash Interface	NO
Data Polling	YES	Endurance	3000 Write/Erase Cycles
JESD-30 Code	R-PDSO-G48	Length	18.4 mm
Memory Density	68719476736 bit	Memory IC Type	FLASH
Memory Width	8	Number of Functions	1
Number of Sectors/Size	4K	Number of Terminals	48
Number of Words	8589934592 words	Number of Words Code	8000000000
Operating Mode	ASYNCHRONOUS	Operating Temperature-Max	70 °C
Operating Temperature-Min		Organization	8GX8
Output Characteristics	3-STATE	Page Size	4K words
Parallel/Serial	PARALLEL	Programming Voltage	3.3 V
Ready/Busy	YES	Seated Height-Max	1.2 mm
Sector Size	2M	Standby Current-Max	0.00005 A
Supply Current-Max	0.05 mA	Supply Voltage-Max (Vsup)	3.6 V
Supply Voltage-Min (Vsup)	2.7 V	Supply Voltage-Nom (Vsup)	3.3 V
Surface Mount	YES	Technology	CMOS
Terminal Form	GULL WING	Terminal Pitch	0.5 mm
Terminal Position	DUAL	Toggle Bit	YES
Type	MLC NAND TYPE	Width	12 mm
Write Cycle Time-Max (tWC)	0.00002 ms

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