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RC32614A000GBB#BC0 +BOM

Clock Synthesizer / Jitter Cleaner System Synchronizer for IEEE 1588 - Six Channels

RC32614A000GBB#BC0 Allgemeine Beschreibung

The RC32614A System Synchronizer for IEEE 1588 generates ultra-low jitter; precision timing signals based on the IEEE 1588 Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE). The device can be used as a single timing and synchronization source for a system or two of them can be used as a redundant pair for improved system reliability. Digitally Controlled Oscillators (DCOs) are available to be controlled by IEEE 1588 clock recovery servo software running on an external processor. The device supports physical layer timing with Digital PLLs (DPLLs) and other timing blocks necessary to implement a Synchronous Equipment Timing Source (SETS) for SyncE. The DCOs can be controlled using IEEE 1588 information alone, or they can combine IEEE 1588 time information with physical layer frequency information from SyncE in accordance with ITU-T G.8273.2. The device can be used to actively measure and compensate for clock propagation delays across backplanes and across circuit boards to ensure the distribution of accurate time and phase with minimal time error between IEEE 1588 Time Stamp Units (TSUs) in a system. The device supports multiple independent channels that control: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and universal frequency translation. Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed. The device outputs ultra-low-jitter clocks that can directly synchronize up to 112Gbps PAM-4 PHYs, as well as CPRI/OBSAI, SONET/SDH and PDH interfaces and IEEE 1588 TSUs.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.
To easily implement synchronization in IEEE 1588 systems, Renesas offers PTP Clock Manager Software for free under license.

Renesas Technology Corp Inventar

Hauptmerkmale

  • Six independent timing channels
  • Ultra-low phase noise (UPN), wideband Analog PLL (APLL) channel with jitter < 88fs RMS
  • Digital PLLs (DPLLs) lock to any frequency from 0.5Hz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • DPLLs comply with ITU-T G.8262 for Synchronous Ethernet (SyncE)
  • IEEE 1588 Support:
    • DCOs can be controlled by external IEEE 1588 software to synthesize Precision Time Protocol (PTP) / IEEE 1588 clocks with frequency resolution less than 1.11x10-16
    • Combo Bus simplifies compliance with ITU-T G.8273.2
    • Precise (1ps) resolution for phase measurement and control
    • All outputs/inputs can be configured to decode/encode PWM clock signals
    • PWM can be used to transmit and receive embedded frame and sync pulses; as well as Time of Day (ToD) and other data
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI
Renesas Technology Corp Originalbestand
Renesas Technology Corp Inventar

Spezifikationen

Pin Count 144 Released Date Jan 6, 2022
Last Modified Date Aug 1, 2023 2:15 PM UTC

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