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Siehe Technische Spezifikationen

RTL8192CE +BOM

SINGLE-CHIPIEEE802.11b/g/n2T2RWLANCONTROLLERw/PCIEXPRESSINTERFACE

Hersteller:

REALTEK
Herstellerteil #:

RTL8192CE
Datenblatt:

RTL8192CE Datenblatt (PDF)
Paket/Koffer:

QFN-64
RoHS:
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an RTL8192CE

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

Hauptmerkmale

General
CMOS MAC and Baseband MIMO PHY Single Chip for
IEEE 802.11a/b/g/n compatible WLAN
Complete 802.11n MIMO solution coupled with RTL8256 for 2.4G solution.
2x2 MIMO technology for extended reception robustness
and exceptional throughput
Maximum PHY data rate up to 150Mbps using 20MHz bandwidth,
300Mbps using 40MHz bandwidth
Compatible with 802.11n draft 2.0 specification.
Backward compatible with 802.11a/b/g devices while operating
at 802.11n data rates
200Mbps UDP throughput in 40MHz mode.
14 x 14mm 128-pin TQFP package
Host Interface
Complies with PCI Express™ Base Specification Revision 1.1
Standards Supported
IEEE 802.11a/b/g/n compatible WLAN
IEEE 802.11e QoS Enhancement (WMM, WMM-SA Client mode)
IEEE 802.11h TPC, DFS, Spectrum Measurement
IEEE 802.11k Radio Resource Measurement
IEEE 802.11i (WPA, WPA2). Open, shared key,
and pair-wise key authentication services
Cisco Compatible Extensions (CCX4)
MAC Features
Frame aggregation for increased MAC efficiency (A-MSDU, A-MPDU)
Low latency immediate High-Throughput Block Acknowledgement (HT-BA)
Long NAV for media reservation with CF-End for NAV release
PHY-level spoofing to enhance legacy compatibility
MIMO power saving mechanism
Channel management and co-existence
Multiple BSSID feature allows the RTL8192E-GR to assume
multiple MAC identities when used as a wireless bridge
Supports Wake-On-WLAN via Magic Packet and Wake-up frame
Transmit Opportunity (TXOP) Short Inter-Frame Space (SIFS)
bursting for higher multimedia bandwidth
Peripheral Interfaces
General Purpose Input/Output (8 pins)
4-wire EEPROM control interface (93C46 and 93C56)
4-wire RF control interface (RTL8256 and RTL8258)
Two configurable LED pins
PHY Features
IEEE 802.11n draft 2.0 MIMO OFDM
Two Transmit and Two Receive paths (2T2R)
20MHz and 40MHz bandwidth transmission
Short Guard Interval (400ns)
One spatial stream STBC transmission for extended coverage
Sounding packet
DSSS with DBPSK and DQPSK, CCK modulation with long and short preamble
OFDM with BPSK, QPSK, 16QAM, 64QAM, and 256QAM modulation.
Convolutional Coding Rate: 1/2, 2/3, 3/4, and 5/6
Maximum data rate 54Mbps in 802.11g, and 300Mbps in 802.11n
OFDM receive diversity with MRC using up to 4 receive paths.
Switch diversity used for DSSS/CCK.
Hardware antenna diversity
Selectable digital transmit and receive FIR filters
Programmable scaling in transmitter and receiver to trade
quantization noise against increased probability of clipping
Fast receiver Automatic Gain Control (AGC)
On-chip ADC and DAC

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