Bezahlverfahren
SAK-XC2288H-200F100L AB +BOM
Booked in advance the procurement of ROHS compliant transistors in LQFP-144-EP packaging
QFP-
Hersteller:
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Herstellerteil #:
SAK-XC2288H-200F100L AB
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Datenblatt:
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Core:
C166SV2
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Data Bus Width:
16 bit/32 bit
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Series:
SAxXC2288H
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Packaging:
[ "Reel", "Cut Tape" ]
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EDA/CAD Modelle:
Fordern Sie kostenlose CAD-Modelle für an SAK-XC2288H-200F100L AB
All bill of materials (BOM) can be sent via email to [email protected], or fill below form to Quote for SAK-XC2288H-200F100L AB, guaranteed quotes back within 12hr.
Verfügbarkeit: 7072 Stck
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SAK-XC2288H-200F100L AB Allgemeine Beschreibung
Moreover, the SAK-XC2288H-200F100L AB is equipped with advanced security features to protect sensitive data and ensure system integrity. These features include code protection mechanisms and secure boot options, enhancing the overall reliability and security of the microcontroller. Whether it's in automotive systems, industrial automation, or consumer electronics, the SAK-XC2288H-200F100L AB offers a powerful combination of performance, memory, and security features to meet the demands of modern electronic applications
Hauptmerkmale
- For a quick overview or reference, the XC228x’s properties are listed here in a condensed way.
- High Performance 16-bit CPU with 5-Stage Pipeline
- – 15 ns Instruction Cycle Time at 66 MHz CPU Clock (Single-Cycle Execution)
- – 1-Cycle 32-bit Addition and Subtraction with 40-bit Result
- – 1-Cycle Multiplication (16 × 16 bit)
- – 1-Cycle Multiply-and-Accumulate (MAC) Instructions
- – Background Division (32 / 16 bit) in 21 Cycles
- – Enhanced Boolean Bit Manipulation Facilities
- – Zero-Cycle Jump Execution
- – Additional Instructions to Support HLL and Operating Systems
- – Register-Based Design with Multiple Variable Register Banks
- – Fast Context Switching Support with Two Additional Local Register Banks
- – 16 Mbytes Total Linear Address Space for Code and Data
- – 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
- 16-Priority-Level Interrupt System with up to 87 Sources, Selectable External Inputs for Interrupt Generation and Wake-Up, Sample-Rate down to 15 ns
- 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
- Clock Generation from Internal or External Clock Sources, via on-chip PLL or via Prescaler
- On-Chip Memory Modules
- – 1 Kbyte On-Chip Stand-By RAM (SBRAM)
- – 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
- – 16 Kbytes On-Chip Data SRAM (DSRAM)
- – Upt to 64 Kbytes On-Chip Program/Data SRAM (PSRAM)
- – Up to 768 Kbytes On-Chip Program Memory (Flash Memory)
- On-Chip Peripheral Modules
- – Two Synchronizable A/D Converters with a total of 24 Channels, 10-bit Resolution, Conversion Time down to 1.2 µs, Optional Data Preprocessing (Data Reduction, Range Check)
- – 16-Channel General Purpose Capture/Compare Unit (CAPCOM2)
- – Up to four Capture/Compare Units for flexible PWM Signal Generation (CCU6x)
- – Multi-Functional General Purpose Timer Unit with 5 Timers
- – Six Serial Interface Channels to be used as UART, LIN, High-Speed Synchronous Channel (SPI/QSPI), IIC Bus Interface (10-bit addressing, 400 kbit/s), IIS Interface
- – On-Chip MultiCAN Interface (Rev. 2.0B active) with 128 Message Objects
- (Full CAN/Basic CAN) on up to 5 CAN Nodes and Gateway Functionality
- – On-Chip Real Time Clock
- Up to 12 Mbytes External Address Space for Code and Data
- – Programmable External Bus Characteristics for Different Address Ranges
- – Multiplexed or Demultiplexed External Address/Data Buses
- – Selectable Address Bus Width
- – 16-Bit or 8-Bit Data Bus Width
- – Five Programmable Chip-Select Signals
- – Hold- and Hold-Acknowledge Bus Arbitration Support
- Single Power Supply from 3.0 V to 5.5 V
- Power Reduction Modes with Flexible Power Management
- Programmable Watchdog Timer and Oscillator Watchdog
- Up to 118 General Purpose I/O Lines
- On-Chip Bootstrap Loader
- Supported by a Large Range of Development Tools like C-Compilers, Macro Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards
- On-Chip Debug Support via JTAG Interface
- 144-Pin Green LQFP Package, 0.5 mm (19.7 mil) pitch
Spezifikationen
Product Category | 16-bit Microcontrollers - MCU | Core | C166SV2 |
Data Bus Width | 16 bit/32 bit | Series | SAxXC2288H |
Packaging | [ "Reel", "Cut Tape" ] | Moisture Sensitive | Yes |
Product Type | 16-bit Microcontrollers - MCU | Factory Pack Quantity | 500 |
Subcategory | Microcontrollers - MCU | Part # Aliases | SP000844806 KX2288H2F1LABXT XC2288H200F100LABKXUMA1 |
Programmabe | Not Verified | Core Processor | C166SV2 |
Core Size | 16/32-Bit | Speed | 100MHz |
Connectivity | CANbus, EBI/EMI, I²C, LINbus, SPI, SSC, UART/USART, USI | Peripherals | DMA, I²S, POR, PWM, WDT |
Number of I/O | 118 | Program Memory Size | 1.6MB (1.6M x 8) |
Program Memory Type | FLASH | RAM Size | 138K x 8 |
Voltage - Supply (Vcc/Vdd) | 3V ~ 5.5V | Data Converters | A/D 24x10b |
Oscillator Type | Internal | Operating Temperature | -40°C ~ 125°C (TA) |
Mounting Type | Surface Mount | Base Product Number | XC2288 |
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In Stock: 7.072
Minimum Order: 1
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