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Siehe Technische Spezifikationen

XC95144XL-7TQG100C +BOM

YES 100-LQFP 1996 XC95144XL complex programmable logic device 125MHz 14mm 7.5ns 3V~3.6V

Hersteller:

XILINX
Herstellerteil #:

XC95144XL-7TQG100C
Datenblatt:

XC95144XL-7TQG100C Datenblatt (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Transferred
Pin Count:

100
Reach Compliance Code:

compliant
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an XC95144XL-7TQG100C

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

XC95144XL-7TQG100C Allgemeine Beschreibung

Incorporating advanced features like JTAG programming, an on-chip oscillator, and an internal voltage regulator, the XC95144XL-7TQG100C offers convenience and efficiency in design implementation. Its low power consumption makes it a cost-effective choice for custom logic functions in digital systems. Whether using schematic capture or hardware description languages, this FPGA's flexible architecture allows for seamless integration of intricate designs

Hauptmerkmale

XC95-144 is a high-performance CPLD
Features In-System Programmability (ISP)
Operates at speed grade 7 with 3.3V power supply
Comes in 100-pin TQFP package for easy integration
144 macrocells and 36 I/O pins for versatile application
Offers re-programmable architecture for reduced design costs

Anwendung

XC95144XL-7TQG100C enables speed
XC95144XL-7TQG100C enhances performance
XC95144XL-7TQG100C boosts productivity

Spezifikationen

Pbfree Code	Yes	Part Life Cycle Code	Transferred
Pin Count	100	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.39.00.01
Factory Lead Time	52 Weeks	Additional Feature	YES
Clock Frequency-Max	138.88 MHz	In-System Programmable	YES
JESD-30 Code	S-PQFP-G100	JESD-609 Code	e3
JTAG BST	YES	Length	14 mm
Moisture Sensitivity Level	3	Number of Dedicated Inputs
Number of I/O Lines	81	Number of Inputs	81
Number of Macro Cells	144	Number of Outputs	81
Number of Terminals	100	Operating Temperature-Max	70 °C
Operating Temperature-Min		Organization	0 DEDICATED INPUTS, 81 I/O
Output Function	MACROCELL	Peak Reflow Temperature (Cel)	260
Programmable Logic Type	FLASH PLD	Propagation Delay	7.5 ns
Qualification Status	Not Qualified	Seated Height-Max	1.6 mm
Supply Voltage-Max	3.6 V	Supply Voltage-Min	3 V
Supply Voltage-Nom	3.3 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	COMMERCIAL
Terminal Finish	MATTE TIN	Terminal Form	GULL WING
Terminal Pitch	0.5 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	30	Width	14 mm

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