Bezahlverfahren
ZL30143GGG2 +BOM
The ZL30143GGG2 chip is a cutting-edge timing solution designed to meet the demanding requirements of modern packet-based networks
BGA-
Hersteller:
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Herstellerteil #:
ZL30143GGG2
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Datenblatt:
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Series:
ZL30143
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Output Clocks:
3
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Input Frequency:
0.15Hz - 300MHz
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Output Frequency:
10kHz - 1GHz
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EDA/CAD Modelle:
Verfügbarkeit: 7666 Stck
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ZL30143GGG2 Allgemeine Beschreibung
Incorporating advanced jitter attenuation technology, the ZL30143GGG2 minimizes phase noise and delivers high-quality clock signals, ensuring reliable operation in telecommunications, networking, and industrial applications where precise timing is paramount. Additionally, the device's programmable features and integrated EEPROM enable easy configuration and customization to meet specific system requirements, while its low power consumption and high reliability further enhance its appeal. By choosing the ZL30143GGG2, engineers and designers can be confident in the device's performance and its ability to meet the stringent demands of modern timing applications
Hauptmerkmale
- Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks (EEC option 1 and 2)
- Supports the requirements of Telcordia GR-1244 Stratum 3 and GR-253, ITU-T G.813, and G.781 SETS
- Supports ITU-T G.823, G.824 and G.8261 for 2048 kbit/s and 1544 kbit/s interfaces
- Meets the SONET/SDH jitter generation requirements up to OC-48/STM-16
- Synchronizes to telecom reference clocks (2 kHz, N*8 kHz up to 77.76 MHz, 155.52 MHz) or to Ethernet reference clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz)
- Supports composite clock inputs (64 kHz, 64 kHz + 8 kHz, 64kHz + 8 kHz + 400 Hz)
- Generates standard SONET/SDH clock rates (e.g., 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz, 622.08 MHz) or Ethernet clock rates (e.g., 25 MHz, 50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for synchronizing Gigabit Ethernet PHYs
- Programmable output synthesizers (P0, P1) generate telecom clock frequencies from any multiple of 8 kHz up to 100 MHz
- Generates several styles of telecom frame pulses with selectable pulse width, polarity and frequency
- Provides two DPLLs which are independently configurable through a serial interface
- Internal state machine automatically controls mode of operation (free-run, locked, holdover)
- Flexible input reference monitoring automatically disqualifies references based on frequency and phase irregularities
- Provides automatic reference switching and holdover during loss of reference input
- Supports master/slave configuration and dynamic input to output delay compensation for AdvancedTCA
- Configurable input to output delay and output to output phase alignment
Anwendung
- ITU-T G.8262 System Timing Cards which support 1 GbE and 10 GbE interfaces
- Telcordia GR-253 Carrier Grade SONET/SDH Stratum 3 System Timing Cards
- System Timing Cards which supports ITU-T G.781 SETS (SDH Equipment Timing Source)
Spezifikationen
Product Name | ZL30143GGG2 | Product Type | Clock Generator |
Series | ZL30143 | Output Clocks | 3 |
Input Frequency | 0.15Hz - 300MHz | Output Frequency | 10kHz - 1GHz |
PLL | Yes | Voltage - Supply | 3.135V - 3.465V |
Operating Temperature | 0°C ~ 70°C |
Servicerichtlinien und andere
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In Stock: 7.666
Minimum Order: 1
Menge. | Einzelpreis | Ext. Preis |
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1+ | - | - |
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