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Siehe Technische Spezifikationen

GAL22V10D-25LJNI +BOM

SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD

Hersteller:

LATTICE SEMICONDUCTOR CORP
Herstellerteil #:

GAL22V10D-25LJNI
Datenblatt:

GAL22V10D-25LJNI Datenblatt (PDF)
Pbfree Code:

Yes
Part Life Cycle Code:

Obsolete
Pin Count:

28
HTS Code:

8542.39.00.01
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an GAL22V10D-25LJNI

GAL22V10D-25LJNI Allgemeine Beschreibung

The GAL22V10D-25LJNI CPLD is a reliable solution for embedded systems, communications equipment, industrial automation, and other applications requiring complex logic functions. Its versatile design allows for customization according to your specific requirements, offering flexibility and efficiency in your designs. With Lattice Semiconductor's reputation for quality and innovation, you can trust that the GAL22V10D-25LJNI will deliver exceptional performance and reliability

Hauptmerkmale

GAL22V10D-25LJNI provides high-speed digital solutions
It has 22 inputs, 10 outputs, and 10 registered output values
It operates at a fast speed of 25 nanoseconds
It's suitable for applications requiring compact and high-performance design

LATTICE SEMICONDUCTOR CORP Originalbestand

Anwendung

Protocol conversion capabilities
Perfect for aerospace applications
Industrial automation made efficient

Spezifikationen

Pbfree Code	Yes	Part Life Cycle Code	Obsolete
Pin Count	28	Reach Compliance Code
HTS Code	8542.39.00.01	Additional Feature	10 MACROCELLS; SHARED INPUT/CLOCK
Architecture	PAL-TYPE	Clock Frequency-Max	33.3 MHz
JESD-30 Code	S-PQCC-J28	JESD-609 Code	e3
Length	11.5062 mm	Moisture Sensitivity Level	1
Number of Dedicated Inputs	11	Number of I/O Lines	10
Number of Inputs	22	Number of Outputs	10
Number of Product Terms	132	Number of Terminals	28
Operating Temperature-Max	85 °C	Operating Temperature-Min	-40 °C
Organization	11 DEDICATED INPUTS, 10 I/O	Output Function	MACROCELL
Peak Reflow Temperature (Cel)	245	Power Supplies	5 V
Programmable Logic Type	EE PLD	Propagation Delay	25 ns
Qualification Status	Not Qualified	Seated Height-Max	4.572 mm
Supply Voltage-Max	5.5 V	Supply Voltage-Min	4.5 V
Supply Voltage-Nom	5 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	Matte Tin (Sn)	Terminal Form	J BEND
Terminal Pitch	1.27 mm	Terminal Position	QUAD
Time@Peak Reflow Temperature-Max (s)	40	Width	11.5062 mm

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[email protected]

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Verpackung

AVAQ bestimmt und verpackt alle Geräte auf der Grundlage der Schutzanforderungen gegen elektrostatische Entladung (ESD) und Feuchtigkeitsempfindlichkeit (MSL)..