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LC4512V-5FN256C +BOM

Reconfigurable architecture enables fast design prototyping and modification

Hersteller:

Lattice Semiconductor Corp
Herstellerteil #:

LC4512V-5FN256C
Datenblatt:

LC4512V-5FN256C Datenblatt (PDF)
Shipping Restrictions:

This product may require additional documentation to export from the United States.
Series:

LC4512V
Mounting Style:

SMD/SMT
Operating Supply Voltage:

3.3 V
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an LC4512V-5FN256C

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

LC4512V-5FN256C Allgemeine Beschreibung

The high performance ispMACH 4000 family from Lattice offers a SuperFAST CPLD solution. The family is a blend of Lattice’s two most popular architectures: the ispLSI® 2000 and ispMACH 4A. Retaining the best of both families, the ispMACH 4000 architecture focuses on significant innovations to combine the highest performance with low power in a flexible CPLD family.

The ispMACH 4000 combines high speed and low power with the flexibility needed for ease of design. With its robust Global Routing Pool and Output Routing Pool, this family delivers excellent First-Time-Fit, timing predictability, routing, pin-out retention and density migration.

The ispMACH 4000 family offers densities ranging from 32 to 512 macrocells. There are multiple density-I/O combinations in Thin Quad Flat Pack (TQFP), Chip Scale BGA (csBGA) and Fine Pitch Thin BGA (ftBGA) packages ranging from 44 to 256 pins/balls. Table 1 shows the macrocell, package and I/O options, along with other key parameters.

The ispMACH 4000 family has enhanced system integration capabilities. It supports 3.3V (4000V), 2.5V (4000B) and 1.8V (4000C/Z) supply voltages and 3.3V, 2.5V and 1.8V interface voltages. Additionally, inputs can be safely driven up to 5.5V when an I/O bank is configured for 3.3V operation, making this family 5V tolerant. The ispMACH 4000 also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing. The ispMACH 4000 family members are 3.3V/ 2.5V/1.8V in-system programmable through the IEEE Standard 1532 interface. IEEE Standard 1149.1 boundary scan testing capability also allows product testing on automated test equipment. The 1532 interface signals TCK, TMS, TDI and TDO are referenced to VCC (logic core).

Lattice Semiconductor Corp Originalbestand

Spezifikationen

Product Category:	CPLD - Complex Programmable Logic Devices	Shipping Restrictions:	This product may require additional documentation to export from the United States.
Series:	LC4512V	Mounting Style:	SMD/SMT
Operating Supply Voltage:	3.3 V	Number of Macrocells:	512 Macrocell
Number of I/Os:	48 I/O	Supply Voltage - Max:	3.6 V
Supply Voltage - Min:	3 V	Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 90 C	Maximum Operating Frequency:	322 MHz
Propagation Delay - Max:	3.5 ns	Packaging:	Tray
Height:	1.2 mm	Length:	17 mm
Memory Type:	EEPROM	Moisture Sensitive:	Yes
Number of Logic Array Blocks - LABs:	32	Operating Supply Current:	14 mA
Product Type:	CPLD - Complex Programmable Logic Devices	Factory Pack Quantity:	1
Subcategory:	Programmable Logic ICs	Tradename:	ispMACH
Width:	17 mm

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