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SN74LVC1G123DCTR

Single retriggerable monostable multivibrator with Schmitt-trigger inputs

Hersteller:

TI
Herstellerteil #:

SN74LVC1G123DCTR
Datenblatt:

SN74LVC1G123DCTR Datenblatt (PDF)
Number of channels:

1
Supply voltage (min) (V):

1.65
Supply voltage (max) (V):

5.5
Technology family:

LVC
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an SN74LVC1G123DCTR

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SN74LVC1G123DCTR Allgemeine Beschreibung

The SN74LVC1G123 device is a single retriggerable monostable multivibrator designed for 1.65-V to 5.5-V V_CC operation.

This monostable multivibrator features output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.

The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between C_ext and R_ext/C_ext (positive) and an external resistor connected between R_ext/C_ext and V_CC. To obtain variable pulse durations, connect an external variable resistance between R_ext/C_ext and V_CC. The output pulse duration also can be reduced by taking CLR low.

Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A and B inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs.

Hauptmerkmale

Available in the Texas Instruments
NanoFree™ Package
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 8 ns at 3.3 V
Supports Mixed-Mode Voltage Operation on
All Ports
Supports Down Translation to V_CC
Schmitt-Trigger Circuitry on A and B Inputs for
Slow Input Transition Rates
Edge Triggered From Active-High or Active-Low
Gated Logic Inputs
Retriggerable for Very Long Output Pulses, Up to
100% Duty Cycle
Overriding Clear Terminates Output Pulse
Glitch-Free Power-Up Reset on Outputs
I_off Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Spezifikationen

Number of channels	1	Supply voltage (min) (V)	1.65
Supply voltage (max) (V)	5.5	Technology family	LVC
Input type	Schmitt-Trigger	Output type	Push-Pull
Supply current (µA)	20	IOL (max) (mA)	32
IOH (max) (mA)	-32	Features	Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff)
Operating temperature range (°C)	-40 to 125, -40 to 85	Rating	Catalog

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