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Siehe Technische Spezifikationen

XC6VLX240T-2FF1156I +BOM

With a compact 35x35mm package size

Hersteller:

XILINX
Herstellerteil #:

XC6VLX240T-2FF1156I
Datenblatt:

XC6VLX240T-2FF1156I Datenblatt (PDF)
Pbfree Code:

No
Part Life Cycle Code:

Transferred
Pin Count:

1156
Reach Compliance Code:

not_compliant
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an XC6VLX240T-2FF1156I

XC6VLX240T-2FF1156I Allgemeine Beschreibung

The XC6VLX240T-2FF1156I FPGA from Xilinx's Virtex-6 LX family is an advanced and versatile solution designed to meet the demands of high-performance applications. With 24,192 logic cells, 1,536 KB of block RAM, and 520 DSP slices, this FPGA is well-equipped to handle the requirements of telecommunications, aerospace, and industrial automation. Its 8 GTX transceivers enable high-speed data transfer at speeds up to 6.5 Gbps, making it an ideal choice for applications requiring efficient communication interfaces. Additionally, the inclusion of 4 clock management tiles with PLLs ensures precise timing control, further enhancing the overall performance and reliability of the device. Packaged in a flip-chip 1156-pin design and measuring 31x31 mm, the XC6VLX240T-2FF1156I offers a compact form factor for seamless integration into embedded systems. Operating at a maximum speed grade of -2 and featuring a nominal core voltage of 1.0V, as well as auxiliary voltages of 1.2V and 2.5V, this FPGA provides efficient and reliable operation

Spezifikationen

Pbfree Code	No	Part Life Cycle Code	Transferred
Pin Count	1156	Reach Compliance Code	not_compliant
ECCN Code	3A991.D	HTS Code	8542.39.00.01
Clock Frequency-Max	1286 MHz	Combinatorial Delay of a CLB-Max	4.29 ns
JESD-30 Code	S-PBGA-B1156	JESD-609 Code	e0
Length	35 mm	Moisture Sensitivity Level	4
Number of Inputs	600	Number of Logic Cells	241152
Number of Outputs	600	Number of Terminals	1156
Operating Temperature-Max	100 °C	Operating Temperature-Min	-40 °C
Peak Reflow Temperature (Cel)	225	Programmable Logic Type	FIELD PROGRAMMABLE GATE ARRAY
Qualification Status	Not Qualified	Seated Height-Max	3.5 mm
Supply Voltage-Max	1.05 V	Supply Voltage-Min	0.95 V
Supply Voltage-Nom	1 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	INDUSTRIAL
Terminal Finish	TIN LEAD	Terminal Form	BALL
Terminal Pitch	1 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	30	Width	35 mm

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