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XQ2V1000-4BG575N +BOM

FPGA 650MHZ CMOS1.5V 575-P

XQ2V1000-4BG575N Allgemeine Beschreibung

QPro Virtex-II 1.5V Platform FPGAs

Hauptmerkmale

High-Performance, Low-Power, 16-Bit RISC Core

DC to 20MHz Operation, Approaching 1MIPS per MHz

Dual 1.8V Core/3V I/O Enables Low Power/Flexible Interfacing

33 Instructions, Most Single Cycle

Three Independent Data Pointers Accelerate Data Movement with Automatic Increment/Decrement

16-Level Hardware Stack

16-Bit Instruction Word, 16-Bit Data Bus

16 x 16-Bit, General-Purpose Working Registers

Optimized for C-Compiler (High-Speed/Density Code)

Program and Data Memory

32kWords Flash Memory, Mask ROM for High Volume Applications

10,000 Flash Write/Erase Cycles

1kWord of Internal Data RAM

JTAG/Serial Boot Loader for Programming

Peripheral Features

Up to 50 General-Purpose I/O Pins

100/132 Segment LCD Driver

Up to 4 COM and 36 Segments

Static, 1/2, and 1/3 LCD Bias Supported

No External Resistors Required

SPITM and 1-Wire (-RAX/-RAX+/-RFX/-RFX+ Only) Hardware I/O Ports

One or Two Serial UARTs

One-Cycle, 16 x 16 Hardware Multiply/Accumulate with 48-Bit Accumulator

Three 16-Bit Programmable Timers/Counters

8-Bit, Subsecond, System Timer/Alarm

32-Bit, Binary Real-Time Clock with Time-of-Day Alarm

Programmable Watchdog Timer

Flexible Programming Interface

Bootloader Simplifies Programming

In-System Programming Through JTAG

Supports In-Application Programming of Flash Memory

Ultra-Low-Power Consumption

190A typ at 8MHz Flash Operation, PMM1 at 2.2V

700nA typ in Lowest Power Stop Mode

Low-Power 32kHz Mode and Divide-by-256 Mode

Anwendung

Medical Instrumentation

Battery-Powered and Portable Devices

Electrochemical and Optical Sensors

Industrial Control

Data-Acquisition Systems and Data Loggers

Home Appliances

Consumer Electronics

Thermostats/Humidity Sensors

Security Sensors

Gas and Chemical Sensors

HVAC

Smart Transmitters

Spezifikationen

Pbfree Code No Part Life Cycle Code Obsolete
Pin Count 575 Reach Compliance Code not_compliant
ECCN Code 3A001.A.2.C HTS Code 8542.39.00.01
Clock Frequency-Max 650 MHz Combinatorial Delay of a CLB-Max 0.44 ns
JESD-30 Code S-PBGA-B575 JESD-609 Code e0
Length 31 mm Moisture Sensitivity Level 3
Number of CLBs 1280 Number of Equivalent Gates 1000000
Number of Inputs 328 Number of Logic Cells 11520
Number of Outputs 328 Number of Terminals 575
Operating Temperature-Max 125 °C Operating Temperature-Min -55 °C
Organization 1280 CLBS, 1000000 GATES Peak Reflow Temperature (Cel) 225
Power Supplies 1.5,1.5/3.3,3.3 V Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Seated Height-Max 2.6 mm
Supply Voltage-Max 1.575 V Supply Voltage-Min 1.425 V
Supply Voltage-Nom 1.5 V Surface Mount YES
Technology CMOS Temperature Grade MILITARY
Terminal Finish TIN LEAD Terminal Form BALL
Terminal Pitch 1.27 mm Terminal Position BOTTOM
Width 31 mm

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