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Siehe Technische Spezifikationen

GAL20V8B-25QPN +BOM

25ns performance, ideal for quick operations

Hersteller:

Lattice Semiconductor Corporation
Herstellerteil #:

GAL20V8B-25QPN
Datenblatt:

GAL20V8B-25QPN Datenblatt (PDF)
Programmabe:

Not Verified
Programmable Type:

EE PLD
Number Of Macrocells:

8
Mounting Type:

Through Hole
EDA/CAD Modelle:

Fordern Sie kostenlose CAD-Modelle für an GAL20V8B-25QPN

GAL20V8B-25QPN Allgemeine Beschreibung

The GAL20V8B-25QPN stands out as a powerhouse in the realm of CMOS CPLDs, offering not only exceptional performance but also a user-friendly design that simplifies the programming process. With a robust set of features including 24 macrocells, 192 usable inputs, and a maximum propagation delay of 25ns, this device is well-suited for high-speed applications that require quick response times. Its low power consumption and on-chip power-on reset circuit further enhance its reliability, making it a dependable choice for a wide range of industries. Whether you're working on telecommunications, industrial control, or consumer electronics projects, the GAL20V8B-25QPN delivers the flexibility and performance needed to bring your designs to life

Hauptmerkmale

HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— 5 ns Maximum Propagation Delay
— Fmax = 166 MHz
— 4 ns Maximum from Clock Input to Data Output
— UltraMOS® Advanced CMOS Technology
50% to 75% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc on Low Power Device
— 45mA Typ Icc on Quarter Power Device
ACTIVE PULL-UPS ON ALL PINS
E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 24-pin PAL® Devices with Full Function/Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade

Spezifikationen

Programmabe	Not Verified	Programmable Type	EE PLD
Number of Macrocells	8	Voltage - Input	-
Speed	-	Mounting Type	Through Hole

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