Bezahlverfahren
LCMXO1200C-3TN144C +BOM
MachXO offers a reliable and efficient solution for complex digital designs
TQFP-144-
Hersteller:
Lattice Semiconductor Corporation
-
Herstellerteil #:
LCMXO1200C-3TN144C
-
Datenblatt:
-
Pbfree Code:
Yes
-
Part Life Cycle Code:
Active
-
Pin Count:
144
-
Reach Compliance Code:
compliant
-
EDA/CAD Modelle:
Fordern Sie kostenlose CAD-Modelle für an LCMXO1200C-3TN144C
All bill of materials (BOM) can be sent via email to [email protected], or fill below form to Quote for LCMXO1200C-3TN144C, guaranteed quotes back within 12hr.
Verfügbarkeit: 6983 Stck
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LCMXO1200C-3TN144C Allgemeine Beschreibung
The LCMXO1200C-3TN144C is a versatile FPGA with a 1,200 LUT capacity, making it suitable for a wide range of digital design applications. With its low-power consumption and high-reliability features, it is an ideal choice for industrial automation and automotive electronics where energy efficiency is paramount. The embedded block RAM and programmable I/O pins enable flexible connectivity and data storage, while the dedicated hardware allows for efficient implementation of complex functions. Its 144-pin TQFP package ensures a compact form factor, making it suitable for consumer electronics and communication systems where space is limited
Hauptmerkmale
- Non-volatile, Infinitely Reconfigurable
- Instant-on – powers up in microseconds
- Single chip, no external configuration memory
- required
- Excellent design security, no bit stream to
- intercept
- Reconfigure SRAM based logic in milliseconds
- SRAM and non-volatile memory programmable
- through JTAG port
- Supports background programming of
- non-volatile memory
- Sleep Mode
- Allows up to 100x static current reduction
- TransFR™ Reconfiguration (TFR)
- In-field logic update while system operates
- High I/O to Logic Density
- 256 to 2280 LUT4s
- 73 to 271 I/Os with extensive package options
- Density migration supported
- Lead free/RoHS compliant packaging
- Embedded and Distributed Memory
- Up to 27.6 Kbits sysMEM™ Embedded Block
- RAM
- Up to 7.5 Kbits distributed RAM
- Dedicated FIFO control logic
- Flexible I/O Buffer
- Programmable sysIO™ buffer supports wide
- range of interfaces:
- − LVCMOS 3.3/2.5/1.8/1.5/1.2
- − LVTTL
- − PCI
- − LVDS, Bus-LVDS, LVPECL, RSDS
- sysCLOCK™ PLLs
- Up to two analog PLLs per device
- Clock multiply, divide, and phase shifting
- System Level Support
- IEEE Standard 1149.1 Boundary Scan
- Onboard oscillator
- Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
- power supply
- IEEE 1532 compliant in-system programming
Spezifikationen
Pbfree Code | Yes | Part Life Cycle Code | Active |
Pin Count | 144 | Reach Compliance Code | compliant |
ECCN Code | EAR99 | HTS Code | 8542.39.00.01 |
JESD-30 Code | S-PQFP-G144 | JESD-609 Code | e3 |
Length | 20 mm | Moisture Sensitivity Level | 3 |
Number of CLBs | 150 | Number of Inputs | 113 |
Number of Logic Cells | 1200 | Number of Outputs | 113 |
Number of Terminals | 144 | Operating Temperature-Max | 85 °C |
Operating Temperature-Min | Organization | 150 CLBS | |
Peak Reflow Temperature (Cel) | 260 | Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Qualification Status | Not Qualified | Seated Height-Max | 1.6 mm |
Supply Voltage-Max | 3.465 V | Supply Voltage-Min | 1.71 V |
Supply Voltage-Nom | 1.8 V | Surface Mount | YES |
Temperature Grade | OTHER | Terminal Finish | MATTE TIN |
Terminal Form | GULL WING | Terminal Pitch | 0.5 mm |
Terminal Position | QUAD | Time@Peak Reflow Temperature-Max (s) | 40 |
Width | 20 mm |
Servicerichtlinien und andere
After-Sales- und Abwicklungsbezogen
Für alternative Zahlungskanäle kontaktieren Sie uns bitte unter:
[email protected]Versandart
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365-Tage-Produkt
Qualitätsgarantie
Wir versprechen, 365 Tage Qualitätssicherung für alle unsere Produkte zu bieten.
In Stock: 6.983
Minimum Order: 1
Menge. | Einzelpreis | Ext. Preis |
---|---|---|
1+ | $20,810 | $20,81 |
200+ | $8,053 | $1.610,60 |
500+ | $7,770 | $3.885,00 |
1000+ | $7,631 | $7.631,00 |
Die unten angegebenen Preise dienen nur als Referenz.
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